Design of 2×VDD logic gates with only 1×VDD devices in nanoscale CMOS technology
نویسندگان
چکیده
The novel 2xVDD NOT, NAND, and NOR logic gates have been designed and implemented in a nanoscale CMOS process with only 1xVDD devices. With the proposed dynamic source bias technique, the logic gates can be designed to have 2xVDD tolerant capability. Thus, the new 2xVDD logic gates can be operated under 2xVDD voltage environment without suffering the gate-oxide reliability issue.
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